verilog code for decimal to binary conversion

The bits which are set to 0 below the top 1 are assumed to be incorrect, The bits which are set to 0 above the top 1 are assumed to be correct,ģ. The bits which are set to 1 are assumed to be correct,Ģ. With some assumptions, we can write a Verilog code which helps to reduce the BER rate of the thermometer code. Let’s assume here we have got the thermometer code which is binary by a very efficient Flash ADC or ROM approach. Several good techniques are available in the design world to get the thermometer code from an analog value. If an encoder used the ROM approach or a combinational circuit which is defined using the Boolean expression, then we arrive at a good solution. The outcome is binary which becomes erroneous because of BER. The comparators of a Flash ADC will be the main cause for this switching noise spreading. One of the main problems here was the BER i.e., Bubble error which mainly comes because of switching noise. There are so many efficient have come up to make it in a more precise way. Thermometer code (Thermometer to Binary conversion)Ī thermometer code is an output of a thermometer-to-binary encoder which is mainly making use of a component called flash ADC (Analog to digital converter). It beats the older traditional mercury thermostat which does the same job. And it is more likely preferred by many because of its high precision and is easy to use. Hence the name digital temperature reader or thermometer. The temperature sensor will detect the temperature changes and the temperature converter will give us a digital number in the required unit. A typical digital thermometer mainly contains a temperature sensor and a converter. This equipment typically measures the temperature or the temperature gradient of an individual. A Digital Thermometer is a piece of bio-medical electronic equipment that can be used for knowing the body temperature of a human. In order to compare results, all of the numbers were checked with an online IEEE 754 float converter. We can this program by breaking it into functions that allow us to run different values through it.

The sign bit was set at the beginning of the program when we determined whether to flip the bits of the LHS register from 2’s complement. This tells us the number of shifts that need to be performed in order to reconstruct the floating-point number from IEEE format. The exponent value comes from the length that the most-significant 1-bit is in.

This gives us a complete mantissa value for the result.

If there are, we should round the last bit of the mantissa to 1. If the RHS value gets shifted too far to the right and we lose precision, we need to check if there are any 1-bits to the right of where the value gets cut off. Since we stored our fraction starting in the MSB, we take the value from that register, shift it to the right however many binary digits the left value takes up, and OR the mantissa LHS value with the RHS fraction. The RHS fractional value must be combined with the LHS value already stored in the result register. Then we apply the AND operation to the mask and the LHS value, and shift the result into the most significant bit for the mantissa value (position 22). To get the mantissa value, if there is a value in the left-hand argument, we find the most significant 1-bit and create a bit mask that is the length of the value excluding the most significant 1-bit. Knowing this value allows us to treat the integer value like a decimal so that we can use a doubling technique to find its binary fractional approximation. We do this by finding a power of 10 that is greater than the RHS argument. The RHS is passed in as an integer, so we need to convert it to a binary fraction. We convert the left-hand argument to a positive binary number even if it was stored as a negative (2’s compliment). The following approach was used to generate a floating point number: The following article discusses exactly what a floating point number is. A simple routine in Verilog HDL that converts integers into IEEE 754 Floating Point format.

Verilog code for decimal to binary conversion